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1 features description/ordering information sn74auc2g53 www.ti.com ................................................................................................................................................ sces484c ? august 2003 ? revised january 2009 single-pole double-throw (spdt) analog switch or 2:1 analog multiplexer/demultiplexer 2 available in the texas instruments nanofree? package operates at 0.8 v to 2.7 v sub-1-v operable low power consumption, 10 m a at 2.7 v high on-off output voltage ratio high degree of linearity latch-up performance exceeds 100 ma per jesd 78, class ii esd protection exceeds jesd 22 ? 2000-v human-body model (a114-a) ? 200-v machine model (a115-a) ? 1000-v charged-device model (c101) yzp terminal assignments d gnd a c gnd y2 b inh y1 a com v cc 1 2 this analog switch is operational at 0.8-v to 2.7-v v cc , but is designed specifically for 1.1-v to 2.7-v v cc operation. the sn74auc2g53 can handle both analog and digital signals. the device permits signals with amplitudes of up to v cc (peak) to be transmitted in either direction. nanofree? package technology is a major breakthrough in ic packaging concepts, using the die as the package. applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems. 1 please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 nanofree is a trademark of texas instruments. production data information is current as of publication date. copyright ? 2003 ? 2009, texas instruments incorporated products conform to specifications per the terms of the texas instruments standard warranty. production processing does not necessarily include testing of all parameters. dct or dcu package (top view) 12 3 4 87 6 5 com inh gndgnd v cc y1y2 a yzp package bump view 1 2 b c d a laser marking view 2 1 b c d a
sn74auc2g53 sces484c ? august 2003 ? revised january 2009 ................................................................................................................................................ www.ti.com ordering information t a package (1) (2) orderable part number top-side marking (3) nanofree? ? wcsp (dsbga) reel of 3000 SN74AUC2G53YZPR _ _ _u4_ 0.23-mm large bump ? yzp (pb-free) ? 40c to 85c ssop ? dct reel of 3000 sn74auc2g53dctr u53_ _ _ vssop ? dcu reel of 3000 sn74auc2g53dcur u53_ (1) for the most current package and ordering information, see the package option addendum at the end of this document, or see the ti web site at www.ti.com . (2) package drawings, thermal data, and symbolization are available at www.ti.com/packaging . (3) dct: the actual top-side marking has three additional characters that designate the year, month, and assembly/test site. dcu: the actual top-side marking has one additional character that designates the assembly/test site. yzp: the actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the assembly/test site. pin 1 identifier indicates solder-bump composition (1 = snpb, ? = pb-free). function table control on inputs channel inh a l l y1 l h y2 h x none logic diagram (positive logic) simplified schematic, each switch (sw) 2 submit documentation feedback copyright ? 2003 ? 2009, texas instruments incorporated product folder link(s): sn74auc2g53 com y y2 a inh y1com 52 76 1 swsw note a: for simplicity , the test conditions shown in figures 1 through 4 and 6 through 10 are for the demultiplexer configuration. signals may be passed from com to y1 (y2) or from y1 (y2) to com.
absolute maximum ratings (1) recommended operating conditions (1) electrical characteristics sn74auc2g53 www.ti.com ................................................................................................................................................ sces484c ? august 2003 ? revised january 2009 over operating free-air temperature range (unless otherwise noted) min max unit v cc supply voltage range (2) ? 0.5 3.6 v v i input voltage range (2) (3) ? 0.5 3.6 v v i/o switch i/o voltage range (2) (3) ? 0.5 v cc + 0.5 v i ik control input clamp current v i < 0 ? 50 ma i i/ok i/o port diode current v i/o < 0 or v i/o > v cc 50 ma i t on-state switch current current v i/o = 0 to v cc 50 ma continuous current through v cc or gnd 100 ma dct package 220 q ja package thermal impedance (4) dcu package 227 c/w yzp package 102 t stg storage temperature range ? 65 150 c (1) stresses beyond those listed under " absolute maximum ratings " may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under " recommended operating conditions " is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) all voltages are with respect to ground unless otherwise specified. (3) the input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. (4) the package thermal impedance is calculated in accordance with jesd 51-7. min max unit v cc supply voltage 0.8 2.7 v v cc = 0.8 v v cc v ih high-level input voltage v cc = 1.1 v to 1.95 v 0.65 ? v cc v v cc = 2.3 v to 2.7 v 1.7 v cc = 0.8 v 0 v il low-level input voltage v cc = 1.1 v to 1.95 v 0.35 ? v cc v v cc = 2.3 v to 2.7 v 0.7 v i/o i/o port voltage 0 v cc v v i control input voltage 0 3.6 v v cc = 0.8 v to 1.6 v 20 t/ v input transition rise or fall rate v cc = 1.65 v to 1.95 v 10 ns/v v cc = 2.3 v to 2.7 v 3.5 t a operating free-air temperature ? 40 85 c (1) all unused inputs of the device must be held at v cc or gnd to ensure proper device operation. refer to the ti application report, implications of slow or floating cmos inputs, literature number scba004. over recommended operating free-air temperature range (unless otherwise noted) parameter test conditions v cc min typ (1) max unit v i = v cc or gnd, 1.1 v 40 i s = 4 ma v inh = v il 1.65 v 12.5 20 r on on-state switch resistance ? (see figure 1 and i s = 8 ma 2.3 v 6 15 figure 2 ) v i = v cc to gnd, 1.1 v 131 180 i s = 4 ma v inh = v il 1.65 v 32 80 r on(p) peak on resistance ? (see figure 1 and i s = 8 ma 2.3 v 15 20 figure 2 ) (1) t a = 25c copyright ? 2003 ? 2009, texas instruments incorporated submit documentation feedback 3 product folder link(s): sn74auc2g53
switching characteristics switching characteristics sn74auc2g53 sces484c ? august 2003 ? revised january 2009 ................................................................................................................................................ www.ti.com electrical characteristics (continued) over recommended operating free-air temperature range (unless otherwise noted) parameter test conditions v cc min typ (1) max unit v i = v cc to gnd, 1.1 v 4 i s = 4 ma difference of on-state resistance v c = v ih 1.65 v 1 r on ? between switches (see figure 1 and i s = 8 ma 2.3 v 1 figure 2 ) v i = v cc and v o = gnd, or 1 i s(off) off-state switch leakage current v i = gnd and v o = v cc , 2.7 v m a 0.1 (1) v inh = v ih (see figure 3 ) 1 v i = v cc or gnd, v inh = v il , i s(on) on-state switch leakage current 2.7 v m a v o = open (see figure 4 ) 0.1 (1) i i control input current v c = v cc or gnd 2.7 v 5 m a i cc supply current v c = v cc or gnd 2.7 v 10 m a c ic control input capacitance 2.5 v 2 pf y 3 c io(off) switch input/output capacitance 2.5 v pf com 4.5 c io(on) switch input/output capacitance 2.5 v 9 pf over recommended operating free-air temperature range, c l = 15 pf (unless otherwise noted) (see figure 5 ) v cc = 1.2 v v cc = 1.5 v v cc = 1.8 v v cc = 2.5 v v cc = 0.8 v from to 0.1 v 0.1 v 0.15 v 0.2 v parameter unit (input) (output) typ min max min max min typ max min max t pd (1) com or y y or com 0.3 0.3 0.3 0.2 0.1 ns t en 9.2 0.5 3.5 0.5 2.2 0.5 1 1.9 0.5 1.8 inh com or y ns t dis 8.1 0.5 4.2 0.5 3.2 0.5 1.9 3.4 0.5 2.6 t en 9.2 0.5 3.6 0.5 2.3 0.5 1.1 1.9 0.5 1.6 a com or y ns t dis 10 0.5 3.6 0.5 2.3 0.5 1.1 2 0.5 1.6 (1) the propagation delay is the calculated rc time constant of the typical on-state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance). over recommended operating free-air temperature range, c l = 30 pf (unless otherwise noted) (see figure 5 ) v cc = 1.8 v v cc = 2.5 v from to 0.15 v 0.2 v parameter unit (input) (output) min typ max min max t pd (1) com or y y or com 0.4 0.2 ns t en 0.5 1.6 3.1 0.5 2.2 inh com or y ns t dis 0.5 2.2 3.4 0.5 2.2 t en 0.5 1.6 3 0.5 2.2 a com or y ns t dis 0.5 1.6 3 0.5 2.3 (1) the propagation delay is the calculated rc time constant of the typical on-state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance). 4 submit documentation feedback copyright ? 2003 ? 2009, texas instruments incorporated product folder link(s): sn74auc2g53
analog switch characteristics sn74auc2g53 www.ti.com ................................................................................................................................................ sces484c ? august 2003 ? revised january 2009 t a = 25c from to parameter test conditions v cc typ unit (input) (output) 0.8 v 90 1.1 v 101 c l = 50 pf, r l = 600 ? , f in = sine wave 1.4 v 110 (see figure 6 ) 1.65 v 122 2.3 v 198 frequency response (1) com or y y or com mhz (switch on) 0.8 v > 500 1.1 v > 500 c l = 5 pf, r l = 50 ? , f in = sine wave 1.4 v > 500 (see figure 6 ) 1.65 v > 500 2.3 v > 500 0.8 v ? 59 1.1 v ? 59 c l = 50 pf, r l = 600 ? , f in = 1 mhz (sine wave) 1.4 v ? 59 (see figure 7 ) 1.65 v ? 59 2.3 v ? 60 crosstalk (2) com or y y or com db (between switches) 0.8 v ? 55 1.1 v ? 55 c l = 5 pf, r l = 50 ? , f in = 1 mhz (sine wave) 1.4 v ? 55 (see figure 7 ) 1.65 v ? 55 2.3 v ? 55 0.8 v 0.56 c l = 50 pf, r l = 600 ? , 1.1 v 0.68 crosstalk f in = 1 mhz (square inh com or y 1.4 v 0.81 mv (control input to signal output) wave) 1.65 v 0.93 (see figure 8 ) 2.3 v 1.5 0.8 v ? 60 1.1 v ? 60 c l = 50 pf, r l = 600 ? , f in = 1 mhz (sine wave) 1.4 v ? 60 (see figure 9 ) 1.65 v ? 60 2.3 v ? 60 feed-through attenuation (3) com or y y or com db (switch off) 0.8 v ? 59 1.1 v ? 59 c l = 5 pf, r l = 600 ? , f in = 1 mhz (sine wave) 1.4 v ? 59 (see figure 9 ) 1.65 v ? 59 2.3 v ? 59 (1) adjust f in voltage to obtain 0 dbm at output. increase f in frequency until db meter reads ? 3 db. (2) adjust f in voltage to obtain 0 dbm at input. (3) adjust f in voltage to obtain 0 dbm at input. copyright ? 2003 ? 2009, texas instruments incorporated submit documentation feedback 5 product folder link(s): sn74auc2g53
operating characteristics operating characteristics sn74auc2g53 sces484c ? august 2003 ? revised january 2009 ................................................................................................................................................ www.ti.com analog switch characteristics (continued) t a = 25c from to parameter test conditions v cc typ unit (input) (output) 0.8 v 6.19 1.1 v 0.39 c l = 50 pf, r l = 10 k ? , f in = 1 khz (sine wave) 1.4 v 0.06 (see figure 10 ) 1.65 v 0.02 2.3 v 0.01 sine-wave distortion com or y y or com % 0.8 v 3.55 1.1 v 0.38 c l = 50 pf, r l = 10 k ? , f in = 10 khz (sine wave) 1.4 v 0.04 (see figure 10 ) 1.65 v 0.02 2.3 v 0.02 for inh input, t a = 25c v cc = 0.8 v v cc = 1.2 v v cc = 1.5 v v cc = 1.8 v v cc = 2.5 v test parameter unit conditions typ typ typ typ typ power dissipation c pd f = 10 mhz 3 3 3 3 3 pf capacitance for a input, t a = 25c v cc = 0.8 v v cc = 1.2 v v cc = 1.5 v v cc = 1.8 v v cc = 2.5 v test parameter unit conditions typ typ typ typ typ outputs 5.5 5.5 5.5 5.5 5.5 power enabled c pd dissipation f = 10 mhz pf outputs capacitance 0.5 0.5 0.5 0.5 0.5 disabled 6 submit documentation feedback copyright ? 2003 ? 2009, texas instruments incorporated product folder link(s): sn74auc2g53
parameter measurement information sn74auc2g53 www.ti.com ................................................................................................................................................ sces484c ? august 2003 ? revised january 2009 figure 1. on-state resistance test circuit figure 2. typical r on as a function of voltage (v i ) for v i = 0 to v cc copyright ? 2003 ? 2009, texas instruments incorporated submit documentation feedback 7 product folder link(s): sn74auc2g53 0 20 40 60 80 100 120 0 1 2 3 v cc = 1.65 v v cc = 1.1 v v cc = 2.3 v v cc v i = v cc or gnd v o r on v i v o i s v i - v o gnd v y1 i s (on) v cc v il y2 av a v inh inhcom v il or v ih s1 2 v a v il v ih s 12
parameter measurement information sn74auc2g53 sces484c ? august 2003 ? revised january 2009 ................................................................................................................................................ www.ti.com figure 3. off-state switch leakage-current test circuit figure 4. on-state switch leakage-current test circuit 8 submit documentation feedback copyright ? 2003 ? 2009, texas instruments incorporated product folder link(s): sn74auc2g53 v cc v i v o gnd y1 (on) v cc v il y2 av a v inh inhcom v il or v ih s1 2 v a v il v ih s 12 a v i = v cc or gnd v o = open v cc v i v o gnd y1 (off) v cc v ih y2 av a v inh inh com v il or v ih s1 2 v a v il v ih s 12 a condition 1: v i = gnd, v o = v cc condition 2: v i = v cc , v o = gnd
parameter measurement information sn74auc2g53 www.ti.com ................................................................................................................................................ sces484c ? august 2003 ? revised january 2009 figure 5. load circuit and voltage waveforms copyright ? 2003 ? 2009, texas instruments incorporated submit documentation feedback 9 product folder link(s): sn74auc2g53 v m t h t su from output under t est c l (see note a) load circuit s1 v load open gnd r l r l data input t iming input v i 0 vv i 0 v 0 v t w input volt age w aveforms setup and hold times volt age w aveforms propaga tion dela y times inverting and noninverting outputs volt age w aveforms pulse dura tion t plh t phl t phl t plh v oh v oh v ol v ol v i 0 v input output w aveform 1 s1 at v load (see note b) output w aveform 2 s1 at gnd (see note b) v ol v oh t pzl t pzh t plz t phz v load /2 0 v v ol + v v oh ? v 0 v v i volt age w aveforms enable and disable times low - and high-level enabling outputoutput t plh /t phl t plz /t pzl t phz /t pzh open v load gnd test s1 notes: a. c l includes probe and jig capacitance. b. w aveform 1 is for an output with internal conditions such that the output is low , except when disabled by the output control. waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. c. all input pulses are supplied by generators having the following characteristics: prr 10 mhz, z o = 50 , slew rate 1 v/ns . d. the outputs are measured one at a time, with one transition per measurement. e. t plz and t phz are the same as t dis . f. t pzl and t pzh are the same as t en . g. t plh and t phl are the same as t pd . h. all parameters and waveforms are not applicable to all devices. output control v m v m v m v m v m v m v m v m v m v m v m v m v i v m v m 0.8 v 1.2 v 0.1 v 1.5 v 0.1 v 1.8 v 0.15 v 2.5 v 0.2 v 1.8 v 0.15 v 2.5 v 0.2 v 2 k 2 k 2 k 2 k 2 k 1 k 500 v cc r l 2 v cc 2 v cc 2 v cc 2 v cc 2 v cc 2 v cc 2 v cc v load c l 15 pf15 pf 15 pf 15 pf 15 pf 30 pf 30 pf 0.1 v0.1 v 0.1 v 0.15 v0.15 v 0.15 v 0.15 v v v cc v cc v cc v cc v cc v cc v cc v i v cc /2 v cc /2 v cc /2 v cc /2 v cc /2 v cc /2 v cc /2 v m t r /t f 2 ns 2 ns 2 ns 2 ns 2 ns 2 ns 2 ns inputs
parameter measurement information sn74auc2g53 sces484c ? august 2003 ? revised january 2009 ................................................................................................................................................ www.ti.com figure 6. frequency response (switch on) figure 7. crosstalk (between switches) 10 submit documentation feedback copyright ? 2003 ? 2009, texas instruments incorporated product folder link(s): sn74auc2g53 v cc v o1 gnd y1 v cc v il y2 v il or v ih 50 w 0.1 m f f in c l 50 pf v cc /2 r in 600 w r l 600 w v o2 c l 50 pf v cc /2 r l 600 w v a v il v ih test condition 20log 10 (v o2 /v i ) 20log 10 (v o1 /v i ) av a v inh inhcom v cc v o gnd y1 (on) v cc v il y2 av a v inh inhcom v il or v ih s1 2 v a v il v ih s 12 50 w 0.1 m f f in r l /c l : 600 w /50 pf r l /c l : 50 w /5 pf r l c l v cc /2
parameter measurement information sn74auc2g53 www.ti.com ................................................................................................................................................ sces484c ? august 2003 ? revised january 2009 figure 8. crosstalk (control input, switch output) figure 9. feedthrough (switch off) copyright ? 2003 ? 2009, texas instruments incorporated submit documentation feedback 11 product folder link(s): sn74auc2g53 v cc v o gnd y1 (off) v cc v il y2 v il or v ih s 12 50 w 0.1 m f f in r l /c l : 600 w /50 pf r l /c l : 50 w /5 pf r l c l v cc /2 r l v cc /2 av a v inh inh com s1 2 v a v il v ih v cc v o gnd y1 (on) v cc y2 v il or v ih s1 2 v a v il v ih s 12 50 w v cc /2 r in 600 w v cc /2 c l 50 pf r l 600 w av a v inh inh com
parameter measurement information sn74auc2g53 sces484c ? august 2003 ? revised january 2009 ................................................................................................................................................ www.ti.com figure 10. sine-wave distortion 12 submit documentation feedback copyright ? 2003 ? 2009, texas instruments incorporated product folder link(s): sn74auc2g53 v cc v o gnd y1 (on) v cc v il y2 v il or v ih s1 2 v a v il v ih s 12 600 w 10 m f f in r l 10 k w c l 50 pf v cc /2 10 m f av a v inh inh com v cc = 0.8 v , v i = 0.7 v p-p v cc = 1.1 v , v i = 1 v p-p v cc = 1.4 v , v i = 1.2 v p-p v cc = 1.65 v , v i = 1.4 v p-p v cc = 2.3 v , v i = 2 v p-p
packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) sn74auc2g53dctr active sm8 dct 8 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74auc2g53dctre4 active sm8 dct 8 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74auc2g53dctrg4 active sm8 dct 8 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74auc2g53dcur active us8 dcu 8 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74auc2g53dcure4 active us8 dcu 8 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74auc2g53dcurg4 active us8 dcu 8 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim SN74AUC2G53YZPR active dsbga yzp 8 3000 green (rohs & no sb/br) snagcu level-1-260c-unlim (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. -- the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. package option addendum www.ti.com 30-dec-2008 addendum-page 1
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant sn74auc2g53dcur us8 dcu 8 3000 180.0 8.4 2.25 3.35 1.05 4.0 8.0 q3 SN74AUC2G53YZPR dsbga yzp 8 3000 180.0 8.4 1.02 2.02 0.63 4.0 8.0 q1 package materials information www.ti.com 6-may-2011 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) sn74auc2g53dcur us8 dcu 8 3000 202.0 201.0 28.0 SN74AUC2G53YZPR dsbga yzp 8 3000 220.0 220.0 34.0 package materials information www.ti.com 6-may-2011 pack materials-page 2
mechanical data mpds049b ? may 1999 ? revised october 2002 post office box 655303 ? dallas, texas 75265 dct (r-pdso-g8) plastic small-outline package ????? ????? ????? ????? 0,60 0,20 0,25 0 ? 8 0,15 nom gage plane 4188781/c 09/02 4,25 5 0,30 0,15 2,90 3,75 2,70 8 4 3,15 2,75 1 0,10 0,00 1,30 max seating plane 0,10 m 0,13 0,65 pin 1 index area notes: a. all linear dimensions are in millimeters. b. this drawing is subject to change without notice. c. body dimensions do not include mold flash or protrusion d. falls within jedec mo-187 variation da.

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